In a solid-state imaging device, various image processings such as defect correction are carried out by a signal processing circuit in order to perform a high quality of a signal obtained from a pixel. Jpn. Pat. Appln. KOKAI Publication No. 2007-335991 discloses the following signal processing circuit. The signal processing circuit is provided with a rearrangement circuit. This rearrangement circuit rearranges signals of a defect correction target pixel and the peripheral same-color nine pixels in the order of the magnitude of a signal level. Based on the foregoing rearrangement result, it is determined whether or not a target pixel has a defect. If the target pixel is a defect pixel, a signal level is substituted for an average value of signal levels from peripheral normal pixels; in this way, defect corrections are made.
However, the foregoing conventional signal processing circuit requires a rearrangement circuit, which rearranges signals from a plurality of pixels in the order to the magnitude of a signal level. For this reason, the circuit scale becomes large. Moreover, when making defect corrections, the conventional circuit makes corrections even if two pixels having a black defect and a white defect exist in the same-color nine pixels. For this reason, erroneous corrections easily occur; as a result, this is a factor of causing a decrease of resolution.